SLIP'10 Technical Program
Sunday, June 13, 2010
Room 207AB - Anaheim Convention Center
Breakfast | 8:00am - 8:30am |
Welcome Message + Keynote Speech |
Shekhar Borkar, Intel Corp.
"Future of Interconnect Fabric - A Contrarian View"
Session I: New Models and Algorithms for Multi-Core Interconnects | 9:30am - 10:20am |
Session Chair: Y. Cao
Modeling NoC Traffic Locality and Energy Consumption with Rent's Communication Probability Distribution
9:30am-9:50am
G. Bezerra, S. Forrest, M. Moses, A. Davis and P. Zarkesh-Ha
Hybrid Network on Chip (HNOC): Local
Buses with a Global Mesh Architecture
9:50am-10:10am
P. Zarkesh-Ha, G. Bezerra, S. Forrest and M. Moses
Discussion Panel - Y. Cao, J. Wang, D. Stroobandt
10:10am-10:20pm
Coffee Break | 10:20am - 10:40am |
Session II: New Modeling Design Techniques to 3D ICs | 10:40am -12:05pm |
Session Chair: D. Chen
Application of 3-D ICs to FPGAs (Invited Talk)
10:40am-11:10am
Peter Suaris, Tierlogic
Process-Induced Skew Variations for Scaled 2-D and 3-D ICs
11:10am-11:30am
H. Xu, V. Pavlidis and G. De Micheli
Through-Silicon-Via-aware Delay and Power Prediction Model for Buffered Interconnects in 3D ICs
11:30am-11:50am
D. H. Kim and S. K. Lim
Discussion Panel - J. Roy, S. Reda and D. Chen
11:50am-12:05pm
Lunch | 12:05pm - 1:10pm |
Session III: New Development in Interconnect Prediction for EM, RF and Packaging | 1:10pm - 3:10pm |
Session Chair: C. K. Cheng
Advanced PCB Routing for Packaging (Invited Talk)
1:10pm-1:40pm
Martin DF Wong, UIUC
Simulation Based Study of Wireless RF Interconnects for Practical CMOS Implementation
1:40pm-2:00pm
A. More and B. Taskin
On-Chip EM-Sensitive Interconnect Structures
2:00pm-2:20pm
D. Li, M. Marek-Sadowska and B. Lee
Analysis of High-Performance Clock Networks with RLC and Transmission Line Effects (short)
2:20pm-2:35pm
W. Condley, X. Hu and M. Guthaus
3-2-1 Contact: An Experimental Approach to the Analysis of Contact Resistance in 45 nm and Below (short)
2:35pm-2:50pm
R. O. Topaloglu
Discussion Panel - C.-K. Cheng, T. Sato and P. Zarkesh-Ha
2:50pm-3:10pm
Coffee Break | 3:10pm - 3:30pm |
Panel: 10 Years Ago and 10 Years From Now | 3:30pm - 4:30pm |
Moderator: A. B. Kahng, UCSD
Panelists: Patrick Groeneveld, Magma, Lou Scheffer, HHMI, Dirk Stroobandt, Ghent Univ.
Session IV: New Performance PredictionTechniques for Interconnects | 4:45pm - 6:20pm |
Session Chair: M. Guthaus
Performance Prediction of Throughput-Centric Pipelined Global Interconnects with Voltage Scaling
4:45pm-5:05pm
Y. Zhang, J. F. Buckwalter and C.-K. Cheng
Fast, Accurate Routing Delay Estimation
5:05pm-5:25pm
J. Qiu, S. Reda and S. Hassoun
Application of Generalized Scattering Matrix for Prediction of Power Supply Noise
5:25pm-5:45pm
K. Yamanaga, K. Masu and T. Sato
Worst-case Performance Prediction Under Supply Voltage and Temperature Variation (short)
5:45pm-6:00pm
C.-K. Cheng, A. B. Kahng, K. Samadi and A. Shayan
Discussion Panel - M. Guthaus, B. Taskin and D. Chen
6:00pm-6:15pm
Banquet Dinner at Buca Di Beppo | 7:00pm - 9:00pm |