SLIP'09 Technical Program

Bill Bottoms  
"Interconnect Solutions for TeraScale Computing"

Session Chair: D. Chen

Honeycomb-Structured Computational Interconnects and Their Scalable Extension to Spherical Domains
10:00am-10:20am
Joseph Cessna and Thomas Bewley

OIL: A Nanophotonic Optical Interconnect Library for a New Photonic Networks-on-Chip Architecture
10:20am-10:40am
Duo Ding and David Z. Pan

Closed-Form Solution for Timing Analysis of Process Variations on SWCNT Interconnect,
10:40am-11:00am
Peng Sun and Rong Luo

Is Overlay Error More Important Than Interconnect Variations in Double patterning?
11:00am-11:20am
Kwangok Jeong, Andrew Kahng and Rasit Topaloglu

Using Circuit Structural Analysis Techniques for Networks in Systems Biology
11:20am-11:40am
Sherief Reda

Discussion Panel - Panelists: D. Chen, D. Stroobandt, and Yu Cao
11:40am-12:00pm

Session Chair: C. K. Cheng

A Pre-Placement Net Length Estimation Technique for Mixed-Size Circuits
1:15pm-1:35pm
Bahareh Fathi, Laleh Behjat and Logan Rakai

Floorplan-based FPGA Interconnect Power Estimation in DSP circuits
1:35pm-1:55pm
Ruzica Jevtic, Carlos Carreras and Vukasin Pejovic

Prediction of High-Performance On-Chip Global Interconnection
1:55pm-2:15pm
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James Buckwalter and Chung-Kuan Cheng

On the Bound of Time-Domain Power Supply Noise Based on Frequency-Domain Target Impedance
2:15pm-2:35pm
Xiang Hu, Wenbo Zhao, Yulei Zhang, Amirali Shayan, A. Ege Engin and Chung-Kuan Cheng

Discussion Panel - Panelists: P. Zarkesh-Ha, C. K. Cheng and Sung Kyu Lim
2:35pm-2:50pm

Session Chair: J. Wang

From 3D Circuit Technologies and Data Structures to Interconnect Prediction (Invited)
3:10pm-3:30pm
Robert Fischbach and Jens Lienig

Through-Silicon-Via Aware Interconnect Prediction and Optimization for 3D Stacked ICs
3:30pm-3:50pm
Dae Hyun Kim, Saibal Mukhopadhyay and Sung Kyu Lim

Predicting the Worst-Case Voltage Violation in a 3D Power Network
3:50pm-4:10pm
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shayan, A. Ege Engin and Chung-Kuan Cheng

Integrated Interlayer Via Planning and Pin Assignment for 3D ICs
4:10pm-4:30pm
Xu He, Sheqin Dong, Xianlong Hong and Saroshi Goto

Discussion Panel - Panelists: J. Wang, D. Pan and S. Reda
4:30pm-4:45pm

Moderator: D. Chen

Nanomaterials for VLSI Interconnect and Energy-Storage Applications
K. Banerejee

Multiband RF-Interconnect for Reconfigurable Network-on-Chip Communications
J. Cong

Carbon Nanotube, Graphene and Atomic Wires as Next Generation Interconnects: Current Status and Future Promise
S. Nayak

Performance Comparison of Cu/Low-K, Carbon Nanotube, and Optics for On-chip and Off-chip Interconnects
K. Saraswat